The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 22, 2007

Filed:

May. 11, 2005
Applicants:

Minoru Yamashita, Kanagawa, JP;

Kazuhiro Kurihara, Tokyo, JP;

Hiroaki Wada, Tokyo, JP;

Inventors:

Minoru Yamashita, Kanagawa, JP;

Kazuhiro Kurihara, Tokyo, JP;

Hiroaki Wada, Tokyo, JP;

Assignee:

Spansion LLC, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

The semiconductor device of the present invention includes a column decoder (select and write circuit), which selects multiple pages that are not located adjacently to each other so as to simultaneously program multiple bits in the memory cells of the selected page, when the multiple bits are programmed in the multiple pages. The page is a selection unit and is composed of a given number of the memory cells located on a same word line. An unnecessary stress of programming is not applied to the memory cells that are not to be programmed, by increasing the distance between the memory cells to be programmed simultaneously.


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