The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 22, 2007

Filed:

Sep. 24, 2004
Applicants:

Aaron Brennan, Moscow, ID (US);

Mark Lugar, Moscow, ID (US);

Mike Mcmenamy, Tensed, ID (US);

Inventors:

Aaron Brennan, Moscow, ID (US);

Mark Lugar, Moscow, ID (US);

Mike McMenamy, Tensed, ID (US);

Assignee:

Cypress Semiconductor Corp., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03B 5/32 (2006.01);
U.S. Cl.
CPC ...
Abstract

According to embodiments of the invention, a nonvolatile memory such as a flash memory is used to configure a single die after packaging of the die has occurred. Thus, numerous applications may be supported by a single die or optimization within a given application may occur. According to embodiments of the invention, the nonvolatile memory may be accessed through a programming interface, and preferably, through a two-pin programming interface, to normalize parameters such as package parasitics, crystal variations, output dividers, output duty cycle, output edge rates, I/O configuration, and oscillator gain. According to an embodiment of the invention, an XO circuit configuration includes a nonvolatile memory and a stand-alone XO, where the XO circuit configuration does not require a PLL to synthesize a reference frequency produced by the XO.


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