The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 22, 2007

Filed:

Mar. 08, 2005
Applicants:

Bhanwar Singh, Morgan Hill, CA (US);

Khoi A. Phan, San Jose, CA (US);

Bharath Rangarajan, Sunnyvale, CA (US);

Iraj Emami, Austin, TX (US);

Ramkumar Subramanian, Sunnyvale, CA (US);

Inventors:

Bhanwar Singh, Morgan Hill, CA (US);

Khoi A. Phan, San Jose, CA (US);

Bharath Rangarajan, Sunnyvale, CA (US);

Iraj Emami, Austin, TX (US);

Ramkumar Subramanian, Sunnyvale, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/544 (2006.01);
U.S. Cl.
CPC ...
Abstract

Systems and/or methods are disclosed for aligning multiple layers of a multi-layer semiconductor device fabrication process and/or system utilizing a composite alignment mark. A component is provided to form the composite alignment mark, such that a first portion of the composite alignment mark is associated with a layer of the wafer and a second portion of the composite alignment mark is associated with a disparate layer of the wafer. An alignment component is utilized to align a reticle for a layer to be patterned to the composite alignment mark.


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