The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 15, 2007

Filed:

Mar. 06, 2003
Applicants:

William J. Cannon, Centerville, OH (US);

Eric W. Zwirner, Dayton, OH (US);

Timothy R. Hoerig, Beavercreek, OH (US);

Paul D. Ward, Centerville, OH (US);

Inventors:

William J. Cannon, Centerville, OH (US);

Eric W. Zwirner, Dayton, OH (US);

Timothy R. Hoerig, Beavercreek, OH (US);

Paul D. Ward, Centerville, OH (US);

Assignee:

Northrop Grumman Corporation, Los Angeles, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/45 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and system for emulating instructions of legacy microprocessors which execute a compiled high-ordered language, such as C/C++, in which the compiled code is structured such that data and instructions segments are segregated. In order to improve the real-time performance of the system, legacy instructions are directly mapped to equivalent instructions of the host processor where possible. Additional techniques may optionally be employed to further increase the real-time performance of the system. By utilizing the direct mapping of the legacy instructions to host instructions, the emulation system in accordance with the present invention provides increased real-time performance for relatively modern RISC microprocessors.


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