The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 15, 2007
Filed:
Dec. 23, 2003
Dipankar Bhattacharya, Macungie, PA (US);
Makeshwar Kothandaraman, Karnataka, IN;
John Christopher Kriz, Palmerton, PA (US);
Bernard Lee Morris, Emmaus, PA (US);
Jeffrey Jay Nagy, Allentown, PA (US);
Stefan Allen Siegel, Fogelsville, PA (US);
Dipankar Bhattacharya, Macungie, PA (US);
Makeshwar Kothandaraman, Karnataka, IN;
John Christopher Kriz, Palmerton, PA (US);
Bernard Lee Morris, Emmaus, PA (US);
Jeffrey Jay Nagy, Allentown, PA (US);
Stefan Allen Siegel, Fogelsville, PA (US);
Agere Syatems Inc., Allentown, PA (US);
Abstract
A compensation circuit comprises a reference circuit including a reference NMOS device and a reference PMOS device. The reference circuit is operative to generate a first reference signal and a second reference signal, the first reference signal being a function of at least one of a process characteristic, a voltage characteristic and a temperature characteristic of the reference NMOS device, and the second reference signal being a function of at least one of a process characteristic, a voltage characteristic and a temperature characteristic of the reference PMOS device. The compensation circuit further comprises a control circuit connected to the reference circuit. The control circuit is operative to receive the first and second reference signals and to generate one or more output signals for compensating for a variation in at least one of a process characteristic, a voltage characteristic and a temperature characteristic of at least one NMOS device and at least one PMOS device in a circuit to be compensated, which is connectable to the control circuit, in response to the first and second reference signals, respectively.