The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 2007

Filed:

Apr. 02, 2004
Applicants:

Takeshi Kitahara, Kanagawa, JP;

Masaaki Yamada, Kanagawa, JP;

Naoyuki Kawabe, Kanagawa, JP;

Masahiro Kanazawa, Kanagawa, JP;

Katsuhiro Seta, Tokyo, JP;

Toshiyuki Furusawa, Tokyo, JP;

Inventors:

Takeshi Kitahara, Kanagawa, JP;

Masaaki Yamada, Kanagawa, JP;

Naoyuki Kawabe, Kanagawa, JP;

Masahiro Kanazawa, Kanagawa, JP;

Katsuhiro Seta, Tokyo, JP;

Toshiyuki Furusawa, Tokyo, JP;

Assignee:

Kabushiki Kaisha Toshiba, Minato-Ku, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

An automatic circuit design apparatus includes a setting module configured to set an upper limit electric potential of a virtual ground line in a circuit to be designed, by use of a cell library for low-threshold cells, a cell library for high-threshold cells, and information of the circuit to be designed. A layout generator is configured to generate a layout based on the information, the cell library for low-threshold cells, and the cell library for high-threshold cells.


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