The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 08, 2007
Filed:
Nov. 01, 2005
Barry Harvey, Los Altos, CA (US);
Barry Harvey, Los Altos, CA (US);
Elantec Semiconductor, Inc., Milpitas, CA (US);
Abstract
A circuit for generating video synchronization timing signals includes a negative peak detector (FIG.) for following variations of a composite video signal (FIG.), rather than clamping the most negative voltage of the composite video signal. The negative peak detector provides a voltage level VTIP representative of the voltage at the synchronization tip of the composite video signal. A sample and hold circuit () is used to add an offset VSLICE to VTIP, VSLICE being a voltage level of the breezeway, color burst, or back porch segments of the composite video signal, or a combination of these segments. To prevent amplifier DC offset error voltages from affecting the perceived VSLICE level, an amplifier () can be connected in a first position TTIP as part of a negative peak detector to store VTIP on a capacitor, in a second position TH as part of a sample and hold circuit to store VREF on a capacitor, and in a third position TCOMP to compare VSLICE+VTIP measured from the capacitors with the composite video signal to generate the overall circuit output.