Delta-sigma analog-to-digital converter suitable for use in a radio receiver channel

Abstract

A radio receiver channel includes an analog front end and a digital signal processing section coupled together by an analog-to-digital converter (ADC) having a delta-sigma modulator coupled to a first digital decimation filter, which is coupled to second digital decimation filter, wherein the first decimation filter includes a source of finite impulse response coefficients coupled so as to provide a plurality of coefficients. The delta-sigma modulator includes a loop filter having a plurality of serially coupled integrators, and a multi-bit quantizer coupled to the loop filter; the multi-bit quantizer including an ADC operable to produce a multi-bit digital output signal, the ADC coupled to a DAC having dual DAC feedback loops, and a dynamic element matching function. In one embodiment, the delta-sigma modulator includes a fifth-order loop filter having five serially coupled integrators with a feedback path from the output to the input of the fifth integrator and a feedback path from the output to the input of the third integrator.