The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 2007

Filed:

Nov. 12, 2003
Applicant:

Dana Wilhelm, Temple City, CA (US);

Inventor:

Dana Wilhelm, Temple City, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 7/537 (2006.01); H02M 7/00 (2006.01); G05F 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A bootstrap diode emulator circuit for use in a half-bridge switching circuit employing transistors connected to one another in a totem pole configuration, a driver circuit for driving the transistors, and a bootstrap capacitor for providing power to the high-side driver circuit. The bootstrap diode emulator circuit includes an LDMOS transistor having a gate, a back-gate, a source and a drain, the drain of the LDMOS transistor being coupled to the high-side supply node, the source of the LDMOS transistor being coupled to the low-side supply node; a gate control circuit electrically coupled to the gate of the LDMOS transistor, and a dynamic back-gate biasing circuit electrically coupled to the back-gate of the LDMOS transistor. The dynamic back-gate biasing circuit is operable to dynamically bias the back-gate of the LDMOS transistor when the LDMOS is turned on by applying a voltage to the back-gate of the LDMOS transistor that is close to but slightly lower than a voltage of the drain of the LDMOS transistor.


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