The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 08, 2007
Filed:
Sep. 30, 2004
Stuart A. Nisbet, Edinburgh, GB;
Stuart A. Nisbet, Edinburgh, GB;
Xilinx, Inc., San Jose, CA (US);
Abstract
Creating virtual extender plugins using MGTs (Multi-Gigabit Transceivers). A virtual extender plugin allows a user seamlessly to bridge between various FPGAs (Filed Programmable Logic Arrays) when designing and implementing electronic devices. These bridges, provided by these virtual extender plugins, allow for efficient use of various untapped resources within a device. For example, a given FPGA may employ virtual extender plugin(s) to access and use various untapped (or relatively lightly tapped) functionality of other FPGAs. These virtual extender plugins may be implemented according to a relatively wide variety of applications allowing the tapping of unused resources such as memory, microprocessor peripherals, LUTs (Look Up Tables), IOs (Input/Output devices and/or ports), memory, and embedded microprocessor blocks. Practically speaking, these virtual extender plugins actually 'plug in' to a standard or user-defined bus stream having a standardized/known type of serialized format such that every type of virtual extender plugin uses that same serialized format.