The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 08, 2007
Filed:
Oct. 27, 2004
Andy Strachan, Santa Clara, CA (US);
Douglas Brisbin, San Jose, CA (US);
Andy Strachan, Santa Clara, CA (US);
Douglas Brisbin, San Jose, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
The drain breakdown voltage walk-in of a dual-source, dual-gate PMOS transistor is significantly reduced by utilizing source regions which have a width that is equal to or less than a width of the drain region. By utilizing source regions with widths that are equal to or less than the width of the drain region, the current density in the drain region is significantly reduced which reduces the number of hot charge carriers that are trapped at the silicon-to-silicon dioxide interface which, turn in, reduces the drain breakdown voltage walk-in rate.