The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 2007

Filed:

Dec. 01, 2004
Applicants:

Kenichi Oi, Osaka, JP;

Hirotaka Jiten, Osaka, JP;

Inventors:

Kenichi Oi, Osaka, JP;

Hirotaka Jiten, Osaka, JP;

Assignee:

Espec Corp., Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/58 (2006.01); H01L 21/66 (2006.01); G01R 31/26 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor testing device of the invention has a measuring substrate that is provided with holes therethrough for exposing a pad of each of the dies of a semiconductor wafer mounted on the measuring substrate, the semiconductor wafer being supported by a wafer holder on one side of the measuring substrate, and the other side of the measuring substrate being provided with a wiring pattern for transmitting an evaluation test signal to the semiconductor wafer supported on the measuring substrate. The measuring substrate, with the pad of each of the dies being wire bonded with a pad of the wiring pattern through the holes, are set for an evaluation test so that a mount part of the semiconductor is placed inside a high temperature chamber, and that a terminal part for applying the evaluation test signal is placed outside of the high temperature chamber. As a result, there is provided a semiconductor testing device, inexpensively, that can suitably evaluate a semiconductor under a temperature of about 400° C., as in EM evaluation for example.


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