The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7212961 B1

PDF
Full Text
Expired
Date of Patent:
May. 01, 2007

Filed:

Aug. 30, 2002
Applicant:

Curtis Settles, Fort Collins, CO (US);

Inventor:

Curtis Settles, Fort Collins, CO (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2006.01); G06F 17/50 (2006.01); H04L 12/66 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for prototyping an integrated circuit may include selecting at least one daughter card for connection to a motherboard. The daughter card is selected having an ability to provide functionality corresponding to a specific integrated circuit device. The at least one daughter card is connected to the motherboard so that the daughter card is communicatively connected to common memory provided on the motherboard. The motherboard is connected to an information handling system utilizing a prototyping interface device, the information handling system providing a virtual software modeling environment for an integrated circuit. The at least one daughter card, information handling system, prototyping interface device and motherboard emulate an integrated circuit design. At least one of software and system integration of the integrated circuit emulated by the motherboard, information handling system, prototyping interface device and the at least one daughter card is tested.


Find Patent Forward Citations

Settles, Curtis. (2007). Interface for rapid prototyping system (U.S. Patent No. 7212961). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7212961

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