The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 24, 2007

Filed:

Aug. 05, 2005
Applicants:

Sho-mo Chen, Cupertino, CA (US);

Fei YE, Cupertino, CA (US);

Feng Yang, Plano, TX (US);

Inventors:

Sho-Mo Chen, Cupertino, CA (US);

Fei Ye, Cupertino, CA (US);

Feng Yang, Plano, TX (US);

Assignee:

ForteMedia Inc., Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

Disclosed methods and apparatus provide embedded memory architectures that lower the overall operational power consumption of memory arrays without sacrificing memory access speed. Because in large memory arrays the leakage current is a considerable portion of the overall power consumption, leakage reduction in memory arrays, manufactured by advanced processing technologies, is a major challenge. To reduce leakage, methods and apparatus are presented for memory access and for power- and ground-supply monitoring and management at memory sub-array level.


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