The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 17, 2007
Filed:
Feb. 10, 2005
Applicant:
Akira Yoshino, Kanagawa, JP;
Inventor:
Akira Yoshino, Kanagawa, JP;
Assignee:
NEC Electronics Corporation, Kanagawa, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01);
U.S. Cl.
CPC ...
Abstract
A memory element structured so as to reduce the size and improve reliability such that a memory gate and control gate are adjacent to each other. The side of a memory gatein contact with a control gateis formed by etching back. This side has a circular arc-shaped curve and is convex towards the control gate. By doing this, a short circuit between the electrodes created by the occurrence of a thin film part in an HTO filmcan be suppressed.
Quick Actions:
Yoshino, Akira. (2007). Non-volatile memory element having memory gate and control gate adjacent to each other (U.S. Patent No. 7206226). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7206226
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