The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 17, 2007

Filed:

Apr. 18, 2005
Applicants:

James F. Asbrock, Oceanside, CA (US);

George W. Dietrich, Murphy, TX (US);

Lloyd F. Linder, Agoura Hills, CA (US);

Inventors:

James F. Asbrock, Oceanside, CA (US);

George W. Dietrich, Murphy, TX (US);

Lloyd F. Linder, Agoura Hills, CA (US);

Assignee:

Raytheon Company, Waltham, MA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01C 5/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Disclosed is a LADAR system and a method for operating same. The LADAR system includes circuitry for generating the electrical signal with an optical signal detector using N discrete samples; a bank of M parallel sample/hold circuit unit cells individual ones of which operate with an associated sample/hold clock, where each sample/hold clock is shifted in time by a fixed or programmable amount Δt relative to a sample/hold clock of an adjacent sample/hold circuit unit cell; and further includes circuitry for sequentially coupling a sampled value of the electrical signal from a first output of individual ones of at least some of the M parallel sample/hold circuit unit cells to an analog to digital converter circuit. Each of the M parallel sample/hold circuit unit cells has a second output for outputting a digital signal for indicating the state (low or high) during a time that the associated sample/hold clock allowing for time of arrival determination. The LADAR system further includes or is coupled to a signal processor for deriving an image of the object and a range to the object based on signals at the first and second outputs. Assuming an effective sample/hold circuit sampling rate of X samples per second, a sampling rate of each of the M parallel sample/hold circuit unit cells can be X/M samples per second.


Find Patent Forward Citations

Asbrock, James. (2007). Readout integrated circuit (roic) for laser detection and ranging (ladar) system and method for using same (U.S. Patent No. 7206062). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7206062

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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