The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 17, 2007

Filed:

Oct. 18, 2004
Applicants:

Chih-hong Fu, Sunnyvale, CA (US);

I-chung Ling, Saratoga, CA (US);

Huai-shih Hsu, San Jose, CA (US);

Inventors:

Chih-Hong Fu, Sunnyvale, CA (US);

I-Chung Ling, Saratoga, CA (US);

Huai-Shih Hsu, San Jose, CA (US);

Assignee:

S3 Graphics Co., Ltd., Grand Caymen, VG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 5/36 (2006.01);
U.S. Cl.
CPC ...
Abstract

A synchronized two-level cache including a level 1 cache and a level 2 cache is implemented in a graphics processing system. The level 2 cache is further partitioned into a number of slots which are dynamically allocated to texture maps as needed. The reference counter of each of the cache lines in each cache level is tracked so that a cache line is not overwritten with new data prior to transferring old data out to the recipient device. The age status of each cache line is tracked so that the oldest cache line is overwritten first. The use of a synchronized two-level cache system conserves system memory bandwidth and reduces memory latency, thereby improving the graphics processing system's performance.


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