The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 17, 2007

Filed:

Sep. 23, 2004
Applicants:

Fang-chen Luo, Hsinchu, TW;

Wan-yi Liu, Hsinchu, TW;

Chieh-chou Hsu, Kaohsiung, TW;

Inventors:

Fang-Chen Luo, Hsinchu, TW;

Wan-Yi Liu, Hsinchu, TW;

Chieh-Chou Hsu, Kaohsiung, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/84 (2006.01); H01L 21/331 (2006.01); H01L 21/8222 (2006.01); H01L 21/20 (2006.01); H01L 21/36 (2006.01); H01L 21/302 (2006.01);
U.S. Cl.
CPC ...
Abstract

A thin film transistor (TFT) and a manufacturing method thereof are provided. The thin film transistor (TFT) comprises a substrate, a gate, an inter-gate dielectric layer, a channel layer and source/drain regions. A gate is formed over the substrate. An inter-gate dielectric layer is formed over the substrate covering the gate. A doped amorphous silicon layer is formed over a portion of the inter-gate dielectric layer at least covering the gate to serve as channel layer. Next, source/drain regions are formed over the channel layer.


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