The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 10, 2007
Filed:
Jan. 20, 2004
Martin Czech, Freiburg, DE;
Erwe Reinhard, Freiburg, DE;
Martin Czech, Freiburg, DE;
Erwe Reinhard, Freiburg, DE;
Micronas GmbH, Freiburg, DE;
Abstract
An integrated circuit includes at least two circuit components formed on a common semiconductor substrate. Each circuit component has a self-contained supply voltage system. Coupling circuits couple the supply voltage systems for the at least two circuit components. Each coupling circuit includes at least one transistor having a base formed by or within the substrate itself; more specifically, by or within a region of the substrate contiguous with collector doping zones and emitter doping zones of the transistor. The resistance between the transistor base and the potentials of the two supply voltage systems coupled by each of the coupling circuits is the intrinsic resistance of the substrate between the region forming the base and one of each contact doping zone conductively connected to the collector or emitter through a metallization applied to the substrate. To obtain an identical coupling behavior for the transistor in both directions, the collector and emitter of the transistor are preferably symmetrical, i.e., a transistor with a double emitter. The coupling circuit may be implemented with a single transistor, the dimensions of which are fixed by the desired volume resistivity. Greater flexibility of design with respect to accommodating the coupling circuit on one substrate surface without an increased area requirement is provided by employing multiple transistors as the coupling circuit. These transistors may be distributed independently of each other on the substrate surface.