The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 03, 2007
Filed:
Mar. 22, 2002
Subramani Kengeri, San Jose, CA (US);
David Walter Carr, Nepean, CA;
Paul Nadj, Ottawa, CA;
Jaya Prakash Samala, San Jose, CA (US);
Subramani Kengeri, San Jose, CA (US);
David Walter Carr, Nepean, CA;
Paul Nadj, Ottawa, CA;
Jaya Prakash Samala, San Jose, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
Error checking and correcting (ECC) is performed on data held in a content addressable memory. An error check circuit receives words from a memory circuit or circuits, generates an error status and generates a corrected value when appropriate. A control circuit sequences through each of the words of the memory circuit(s), periodically reads from the memory circuit the next word in the sequence and provides the next word to the error check circuit. The bandwidth consumed by the periodic error check phase can be controlled by adjusting the interval between reads.