The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 03, 2007
Filed:
Sep. 20, 2005
Jiyoon Chung, South Burlington, VT (US);
Jiyoon Chung, South Burlington, VT (US);
Infineon Technologies AG, Munich, DE;
Abstract
A delay locked loop including a first circuit and a second circuit. The first circuit is configured to receive a clock signal having a frequency and to lock onto the clock signal and provide a first locked clock signal over a first frequency range and a second locked clock signal over a second frequency range. The second circuit is configured to signal the first circuit to lock onto the clock signal to provide the second locked clock signal as the frequency changes from the first frequency range to the second frequency range. Also, the second circuit is configured to signal the first circuit to provide a locked one of the first locked clock signal and the second locked clock signal in a locked output clock signal.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile