The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 03, 2007
Filed:
Jul. 23, 2004
Karen Chu, Pleasanton, CA (US);
Anil Vijayendran, San Jose, CA (US);
Michal Danek, Cupertino, CA (US);
Karen Chu, Pleasanton, CA (US);
Anil Vijayendran, San Jose, CA (US);
Michal Danek, Cupertino, CA (US);
Novellus Systems, Inc., San Jose, CA (US);
Abstract
Methods and structures are provided for conformal lining of dual damascene structures in semiconductor devices that contain porous or low k dielectrics. Features, such as trenches and contact vias are formed in the dielectrics. The features are subjected to low-power plasma predeposition treatment to irregularities on the porous surfaces and/or reactively form an permeation barrier before a diffusion barrier material is deposited on the feature. The diffusion barrier may, for example, be deposited by CVD using metalorganic vapor reagents. The feature is then filled with copper metal and further processed to complete a dual damascene interconnect. The plasma predeposition treatment advantageously reduces the amount of permeation of the metalorganic reagent into the interlayer dielectric.