The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 27, 2007
Filed:
May. 21, 1999
Martin M. Deneroff, Palo Alto, CA (US);
Steven C. Miller, Livermore, CA (US);
Martin M. Deneroff, Palo Alto, CA (US);
Steven C. Miller, Livermore, CA (US);
Silicon Graphics, Inc., Mountain View, CA (US);
Abstract
A computer system () includes a bus controller (), a bus (), a plurality of processing devices () and a plurality of enabling switches (). Each enabling switch () corresponds to a separate one of the processing devices (). Each processing device () sends an access request () to arbitration logic () in the bus controller (), requesting access to the bus (). The arbitration logic () selects one of the access requests () according to a priority protocol. The arbitration logic () generates a control signal () associated with the selected access request (). The control signal () is provided to the enabling switch () corresponding to the processing device () that sent the selected access request (). The enabling switch () enables access to the bus () for the processing device () in response to the control signal (). In this manner, the computer system () can limit a number of processing devices () having access to the bus () in order to control a load on the bus ().