The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 27, 2007
Filed:
Jul. 07, 2004
Nazif Taskin, Munich, DE;
Manfred Pröll, Dorfen, DE;
Manfred Dobler, Ergoldsbach, DE;
Gerald Resch, Munich, DE;
Nazif Taskin, Munich, DE;
Manfred Pröll, Dorfen, DE;
Manfred Dobler, Ergoldsbach, DE;
Gerald Resch, Munich, DE;
Infineon Technologies AG, Munich, DE;
Abstract
An integrated chip has a clock signal input () for application of a first clock signal (clk) and a clock signal output (). Moreover, it has a phase locked loop (), which, on the input side, is connected to the clock signal input () and serves far generating a second clock signal (clk). Furthermore, the chip has a multiplexer (MUX), via which the first clock signal (clk) or the second clock signal (clk) can optionally be switched to the clock signal output (), and a unit for frequency monitoring (), which, on the input side, is connected to the clock signal input () and is designed and can be operated in such a way that, in the event of a limiting frequency (fmin) being undershot, the multiplexer (MUX) is caused to switch the first clock signal (clk) to the clock signal output ().