The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 27, 2007
Filed:
Oct. 21, 2003
Jin-hyuk Lee, Kyungki-Do, KR;
Gu-sung Kim, Kyungki-do, KR;
Dong-ho Lee, Kyungki-do, KR;
Dong-hyeon Jang, Seoul, KR;
Jin-Hyuk Lee, Kyungki-Do, KR;
Gu-Sung Kim, Kyungki-do, KR;
Dong-Ho Lee, Kyungki-do, KR;
Dong-Hyeon Jang, Seoul, KR;
Samsung Electronics Co., Ltd., Suwon-si, KR;
Abstract
A semiconductor wafer with semiconductor chips having chip pads and a passivation layer is provided. First and second dielectric layers are sequentially formed on the passivation layer. The first and second dielectric layers form a ball pad area that includes an embossed portion, i.e., having a non-planar surface. A metal wiring layer is formed on the resulting structure including the embossed portion. A third dielectric layer is formed on the metal wiring layer. A portion of the third dielectric layer located on the embossed portion is removed to form a ball pad. A solder ball is formed on the embossed ball pad. With the embossed ball pad, the contact area between the solder balls and the metal wiring layer is increased, thereby improving the connection reliability.