The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2007
Filed:
May. 21, 2002
Patrick N. Conway, Los Altos, CA (US);
Jeremy J. Farrell, Campbell, CA (US);
Kazunori Masuyama, Kanazawa, JP;
Takeshi Shimizu, Sunnyvale, CA (US);
Sudheer Miryala, San Jose, CA (US);
Patrick N. Conway, Los Altos, CA (US);
Jeremy J. Farrell, Campbell, CA (US);
Kazunori Masuyama, Kanazawa, JP;
Takeshi Shimizu, Sunnyvale, CA (US);
Sudheer Miryala, San Jose, CA (US);
Fujitsu Limited, Kawasaki, JP;
Abstract
A system and method for passing messages between domains with low overhead in a multi-node computer system. A CPU node in a sending domain issues a request to a memory node in a receiving domain using memory-mapped input/output window. This causes the message to be transmitted to a coherent space of the receiving domain. All messages are cache-line in size. A small portion of each cache line, cyclic counter field, is overwritten before the cache line is written in the coherent address space of the receiving domain. A massaging driver polls the cyclic count field of the cache line in the processor cache to determine when the next message is written in the coherent address space of the receiving domain. This allows the CPU to detect when the last received message is written into the coherent address space of the receiving domain without generating transactions on CPU interface.