The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2007
Filed:
Mar. 22, 2002
Jeff A. Bullington, Orlando, FL (US);
Richard A. Stoltz, Plano, TX (US);
Laurent Vaissie, Oviedo, FL (US);
Eric G. Johnson, Oviedo, FL (US);
M. Gamal Moharam, Winter Park, FL (US);
Jeff A. Bullington, Orlando, FL (US);
Richard A. Stoltz, Plano, TX (US);
Laurent Vaissie, Oviedo, FL (US);
Eric G. Johnson, Oviedo, FL (US);
M. Gamal Moharam, Winter Park, FL (US);
The Research Foundation of the University of Central Florida, Orlando, FL (US);
Infinite Photonics, Inc., Orlando, FL (US);
Abstract
Our wafer scale processing techniques produce chip-laser-diodes with a diffraction grating () that redirects output light out the top () and/or bottom surfaces. Generally, a diffraction grating () and integrated lens-grating () are used herein to couple light from the chip to an output fiber (), and the lens-grating () is spaced from the diffraction grating (). Preferably the diffraction grating () and integrated lens grating () are also used to couple light from the output fiber () back to the active region of the chip. The integrated lens-grating () can be in a coupling block (). The use of a coupling block () can eliminate 'facet-type damage'. A coupling block () is generally used herein to couple light from the chip to an output fiber (), and preferably to couple feedback reflected from the fiber () back to the chip.