The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 20, 2007

Filed:

Jul. 13, 2005
Applicant:

Tadahiko Horiuchi, Isehara, JP;

Inventor:

Tadahiko Horiuchi, Isehara, JP;

Assignee:

Nscore Inc., Fukuoka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory circuit includes a latch having a first node and a second node, a plate line, a word selecting line, a first MIS transistor having source/drain nodes thereof coupled to the first node and the plate line, respectively, and a gate node thereof coupled to the word selecting line, a second MIS transistor having source/drain nodes thereof coupled to the second node and the plate line, respectively, and a gate node thereof coupled to the word selecting line, and a driver configured to set the plate line to a first potential causing a current to flow in a first direction through the first MIS transistor in a first operation mode and to a second potential causing a current to flow in a second direction through the first MIS transistor in a second operation mode, the first operation mode causing a lingering change in characteristics of the first MIS transistor.


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