The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2007
Filed:
Dec. 23, 2003
Gregory J. Dunn, Arlington Heights, IL (US);
Remy J. Chilini, Crystal Lake, IL (US);
Robert T. Croswell, Hanover Park, IL (US);
Timothy B. Dean, Elk Grove, IL (US);
Claudia V. Gamboa, Chicago, IL (US);
Jovica Savic, Downers Grove, IL (US);
Gregory J. Dunn, Arlington Heights, IL (US);
Remy J. Chilini, Crystal Lake, IL (US);
Robert T. Croswell, Hanover Park, IL (US);
Timothy B. Dean, Elk Grove, IL (US);
Claudia V. Gamboa, Chicago, IL (US);
Jovica Savic, Downers Grove, IL (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A dielectric circuit board foil () includes a conductive metal foil layer (), a crystallized dielectric oxide layer () disposed adjacent a first surface of the conductive metal foil layer, a lanthanum nickelate layer () disposed on the crystallized dielectric oxide layer, and an electrode layer () that is substantially made of one or more base metals disposed on the lanthanum nickelate layer. The foil () may be adhered to a printed circuit board sub-structure () and used to economically fabricate a plurality of embedded capacitors, including isolated capacitors of large capacitive density (>1000 pf/mm).