The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2007
Filed:
Nov. 21, 2005
Masayuki Mori, Kanagawa, JP;
Keizo Ihara, Saitama, JP;
Nobukazu Sasaki, Yamanashi, JP;
Teruyoshi Kobayashi, Tokyo, JP;
Masayuki Mori, Kanagawa, JP;
Keizo Ihara, Saitama, JP;
Nobukazu Sasaki, Yamanashi, JP;
Teruyoshi Kobayashi, Tokyo, JP;
TEAC Corporation, Musashino, JP;
Abstract
In a TEDS system, a data transmitting and receiving apparatus is provided and a signal transmitted from a TEDS memory to an apparatus side is logically inverted without using a transformer, and further a sneak signal is prevented. Invertersand zener diodesconnected in parallel between the TEDS memory and a data driver of the apparatus are provided. Data transmitted from the TEDS memory to an apparatusside is logically inverted by the inverter, and the logical voltage attenuates by a predetermined amount at the zener diodeto be supplied to the data driver. Since a sneak signalwhose logical voltage attenuates by a predetermined amount again by the zener diodeis supplied to the inverterthe transmission of a logic value is prevented by setting the threshold of the inverterappropriately.