The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 20, 2007

Filed:

Aug. 18, 2004
Applicants:

Evan G. Colgan, Chestnut Ridge, NY (US);

George A. Katopis, Poughkeepsie, NY (US);

Chandrashekhar Ramaswamy, Chandler, AZ (US);

Herbert I. Stoller, Poughkeepsie, NY (US);

Inventors:

Evan G. Colgan, Chestnut Ridge, NY (US);

George A. Katopis, Poughkeepsie, NY (US);

Chandrashekhar Ramaswamy, Chandler, AZ (US);

Herbert I. Stoller, Poughkeepsie, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01);
U.S. Cl.
CPC ...
Abstract

A multiple power density packaging structure with two or more semiconductor chips on a common wiring substrate having a common thermal spreader with a planar surface in thermal contact with the non-active surfaces of the chips. The semiconductor chips have different cooling requirements and some of the chips are thinned to insure that the chips requiring the lowest thermal resistance has the thinnest layer of a thermal adhesive or metal or solder interface between the chip and thermal spreader.


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