The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2007
Filed:
Aug. 16, 2004
Jung-cheng Kao, Shanghai, CN;
Jung-Cheng Kao, Shanghai, CN;
Grace Semiconductor Manufacturing Corporation, Shanghai, CN;
Abstract
A manufacturing method for a transistor of an ESD protection device. First, the method forms basic elements on a semiconductor base. Next, a patterned resist layer is used as a mask to perform ion implantation in the emerged drain region so that the dopant can be implanted into the semiconductor base under the drain region to form an extended drain heavy-doped region. Then, the patterned resist layer is removed and a heat tempering processing is performed. Finally, a self-aligned salicide is formed on the surfaces of the polysilicon gate and the heavy-ion doped region. The invention utilizes an extended drain heavy-doped region as a resistance ballast between the drain contact and the polysilicon contact surface, which allows high current generated by ESD to be discharged in a more homogeneous way so as to prevent the ESD structure from being damaged.