The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 13, 2007
Filed:
Mar. 25, 2002
Yasuo Amano, Kawasaki, JP;
Hiroshi Seki, Kawasaki, JP;
Yukio Makino, Kawasaki, JP;
Yumiko Yamanishi, Kawasaki, JP;
Yoshiko Nakanishi, Kawasaki, JP;
Yoichiro Ishikawa, Kawasaki, JP;
Yasuo Amano, Kawasaki, JP;
Hiroshi Seki, Kawasaki, JP;
Yukio Makino, Kawasaki, JP;
Yumiko Yamanishi, Kawasaki, JP;
Yoshiko Nakanishi, Kawasaki, JP;
Yoichiro Ishikawa, Kawasaki, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
An integrated circuit design apparatus includes a block placement processing unit which performs processing of creation of a lower-rank mounting block in a higher-rank mounting block, and performs processing of creation of virtual placement regions in each of the lower-rank mounting block and the higher-rank mounting block. A functional block assignment processing unit performs processing of assignment of functional blocks to each of the virtual placement regions provided by the block placement processing unit. An evaluation processing unit provides a display of a condition of the functional blocks assigned to each of the virtual placement regions of both the lower-rank mounting block and the higher-rank mounting block, in order to evaluate the condition of the assigned functional blocks.