The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 13, 2007

Filed:

Apr. 29, 2003
Applicants:

Marco DE Angeli, Barzana, IT;

Loc Thi Xuan Dang, San Jose, CA (US);

Gregory Dupree, Petaluma, CA (US);

Roberto Gianella, Milan, IT;

Thomas Hamilton, Milpitas, CA (US);

Steven Lowe, Frisco, TX (US);

Marco Portinari, Bresso, IT;

Inventors:

Marco De Angeli, Barzana, IT;

Loc Thi Xuan Dang, San Jose, CA (US);

Gregory Dupree, Petaluma, CA (US);

Roberto Gianella, Milan, IT;

Thomas Hamilton, Milpitas, CA (US);

Steven Lowe, Frisco, TX (US);

Marco Portinari, Bresso, IT;

Assignee:

Cisco Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/40 (2006.01); G01R 31/317 (2006.01); G01R 31/3185 (2006.01); G01R 31/3187 (2006.01); G06F 13/22 (2006.01); G01R 31/3177 (2006.01);
U.S. Cl.
CPC ...
Abstract

A printed circuit board (PCB) may be used in a first mode where boundary scan techniques are used to externally program and/or test devices on the PCB, or a second mode where an internal source programs devices using boundary scan techniques. In one implementation, there is also additional flexibility to include or skip devices in a boundary scan chain and to accommodate non-scan related functions for pins used for scanning. These various modes of operation may be selected by activating and deactivating buffers.


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