The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 13, 2007

Filed:

May. 19, 2003
Applicants:

Patrick Clement, Bussigny, CH;

Nadim Khlat, Cugnaux, CH;

Inventors:

Patrick Clement, Bussigny, CH;

Nadim Khlat, Cugnaux, CH;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/12 (2006.01);
U.S. Cl.
CPC ...
Abstract

An arrangement () and method for sigma-delta analog-to-digital conversion by providing parallel translating sigma-delta analog-to-digital converters () and summing their outputs to produce a digital output signal having a bandwidth greater than that of the first or second translating sigma-delta analog-to-digital converters (). The parallel translating sigma-delta analog-to-digital converters () use switching sequences arranged to cancel third and fifth harmonics in the digital output signal. Orthogonality error in the switching sequences applied to the sigma-delta modulators is compensated by adjusting the phase of the signals applied to mixers ().


Find Patent Forward Citations

Quick Actions:

Clement, Patrick. (2007). Sigma-delta analog-to-digital converter and method for reducing harmonics (U.S. Patent No. 7190293). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7190293

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…