The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 13, 2007

Filed:

Mar. 23, 2005
Applicants:

Isao Yamamoto, Kyoto, JP;

Kyoichiro Araki, Kyoto, JP;

Yoichi Tamegai, Kyoto, JP;

Inventors:

Isao Yamamoto, Kyoto, JP;

Kyoichiro Araki, Kyoto, JP;

Yoichi Tamegai, Kyoto, JP;

Assignee:

Rohm Co., Ltd., Kyoto, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An input circuit is provided which prevents malfunctioning of a function circuit during a power source voltage rise without the need of a separate Under Voltage Lock Out (UVLO) circuit. The input circuit includes a first transistor which receives an input terminal signal at a gate, a first resistor arranged between the transistor drain and a power source voltage, a second transistor arranged between the first transistor source and a ground potential, a second resistor arranged between the second transistor gate and the power source voltage, a third resistor arranged between the second transistor gate and the ground potential, a third transistor which receives the signal between the first transistor drain and the first resistor at the gate and connects and disconnects the path of the current which flows to the second and third resistors, and a fourth transistor which receives the signal of the input terminal IN at the gate and connects and disconnects the path of the current which flows to the second and third resistors.


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