The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 06, 2007
Filed:
Apr. 19, 2004
Christopher J. Pettey, Cedar Park, TX (US);
Asif Khan, Cedar Park, TX (US);
Annette Pagan, Austin, TX (US);
Richard E. Pekkala, Austin, TX (US);
Robert Haskell Utley, Round Rock, TX (US);
Christopher J. Pettey, Cedar Park, TX (US);
Asif Khan, Cedar Park, TX (US);
Annette Pagan, Austin, TX (US);
Richard E. Pekkala, Austin, TX (US);
Robert Haskell Utley, Round Rock, TX (US);
Nextio, Inc., Austin, TX (US);
Abstract
An apparatus having a first plurality of I/O ports, a second I/O port, and core logic. The first plurality of I/O ports is coupled to a plurality of operating system domains (OSDs) through a load-store fabric, each routing transactions between the plurality of OSDs and the switching apparatus. The second I/O port is coupled to a first shared input/output endpoint. The first shared input/output endpoint requests/completes the transactions for each of the plurality of OSDs. The core logic is coupled to the first plurality of I/O ports and the second I/O port. The core logic routes the transactions between the first plurality of I/O ports and the second I/O port. The core logic designates a corresponding one of the plurality of OSDs according to a variant of a protocol, where the protocol provides for routing of the transactions only for a single OSD.