The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7187213 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 06, 2007

Filed:

Dec. 08, 2004
Applicants:

Hiroshi Yoshida, Fukuoka, JP;

Kazuhito Fujii, Fukuoka, JP;

Inventors:

Hiroshi Yoshida, Fukuoka, JP;

Kazuhito Fujii, Fukuoka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 9/08 (2006.01); H03B 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a semiconductor circuit capable of effectively applying a filter function to both of L-level noise superimposed during originally H signal periods and H-level noise superimposed during originally L signal periods. An input signal branches off into two and one of them is inputted through signal inverting means to a first delay circuit including a first capacitor. The other is inputted to a second delay circuit including a second capacitor. An output signal from the first delay circuit and an output signal from the second delay circuit are inputted to separate input terminals of a flip-flop.


Find Patent Forward Citations

Yoshida, Hiroshi. (2007). Semiconductor circuit (U.S. Patent No. 7187213). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7187213

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