The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 06, 2007
Filed:
Jul. 07, 2003
Sergio Camerlo, Cupertino, CA (US);
Yida Zou, San Jose, CA (US);
Luca Cafiero, Palo Alto, CA (US);
Gary L. Myers, San Ramon, CA (US);
Bobby Parizi, San Jose, CA (US);
Hsing-sheng Liang, San Jose, CA (US);
Sergio Camerlo, Cupertino, CA (US);
Yida Zou, San Jose, CA (US);
Luca Cafiero, Palo Alto, CA (US);
Gary L. Myers, San Ramon, CA (US);
Bobby Parizi, San Jose, CA (US);
Hsing-Sheng Liang, San Jose, CA (US);
Cisco Technology, Inc., San Jose, CA (US);
Abstract
An electronic interconnection system for delivering high-current power and ground voltages using a non-bottom side of a chip package substrate. The system includes a printed wiring board (PWB), a chip package, and a bridge lead. The PWB has at least a first and a second contact pad. The chip package includes a chip and a package substrate. The chip is mounted onto the package substrate and the package substrate has a bottom surface having at least a first contact pad and a second surface having at least a second contact pad. The first contact pad of the PWB and the first contact pad of the package substrate are coupled together. The bridge lead couples the second contact pad of the PWB with the second contact pad of the package substrate. The bridge lead may be selected from styles including flying lead, edge wiping, top wiping, and double wiping.