The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 27, 2007
Filed:
Feb. 20, 2004
Apparatus and method for the simulation of a large main memory address space given limited resources
Michael J. Rieschl, Cottage Grove, MN (US);
Qingyan Chen, Vadnais Heights, MN (US);
Kurt N. Johnson, Edina, MN (US);
Dave Q. Anderson, Coon Rapids, MN (US);
Michael J. Rieschl, Cottage Grove, MN (US);
Qingyan Chen, Vadnais Heights, MN (US);
Kurt N. Johnson, Edina, MN (US);
Dave Q. Anderson, Coon Rapids, MN (US);
Unisys Corporation, Blue Bell, PA (US);
Abstract
A main memory simulation system includes storage files, a cache buffer, and an interface. The storage files includes both a fast look-up table and a slow look-up table. The fast look-up table is operable to directly obtain a page address that has been allocated to a main memory address while the slow look-up table is operable to first determine if a page address has been allocated to a main memory address and then to obtain the allocated page address. The interface operates to receive a request for transfer of main memory, in the form of a main memory address, from a storage file to the buffer of the cache. The interface responds by performing a page transfer between the storage file and buffer according to the page address that has been allocated to the requested main memory address, as found in the fast or slow look-up table.