The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2007

Filed:

Feb. 06, 2003
Applicants:

Francis Joseph, Sunnyvale, CA (US);

Klaus D. Hilliges, Mountain View, CA (US);

Cheryl L. Owen, Cupertino, CA (US);

Inventors:

Francis Joseph, Sunnyvale, CA (US);

Klaus D. Hilliges, Mountain View, CA (US);

Cheryl L. Owen, Cupertino, CA (US);

Assignee:

Verigy Pte. Ltd., Singapore, SG;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04B 3/46 (2006.01); H04B 17/00 (2006.01); H04Q 1/20 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for injecting test jitter in a data bit stream comprises modulating first and second voltage generators to control a rise and fall times of an output signal, respectively. A pair of input voltages are received by a differential pair. At least one current sink device is operated using a first control voltage provided by at least one of the voltage generators to provide an output voltage in response to the input voltages received by the differential pair. A plurality of current sources are operated to provide the output signal using a reference voltage provided by one of the voltage generators in response to the input voltages received by the differential pair, wherein simultaneous variation of the rise and fall times together with the input voltages define the output signal and jitter output by the current sink device and the current sources.


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