The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2007

Filed:

Mar. 03, 2005
Applicants:

Atsushi Hatakeyama, Kawasaki, JP;

Toshimi Ikeda, Kawasaki, JP;

Nobutaka Taniguchi, Kawasaki, JP;

Akira Kikutake, Kawasaki, JP;

Kuninori Kawabata, Kawasaki, JP;

Atsushi Takeuchi, Kawasaki, JP;

Inventors:

Atsushi Hatakeyama, Kawasaki, JP;

Toshimi Ikeda, Kawasaki, JP;

Nobutaka Taniguchi, Kawasaki, JP;

Akira Kikutake, Kawasaki, JP;

Kuninori Kawabata, Kawasaki, JP;

Atsushi Takeuchi, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory device has a data line (DATA-BUS) for connection to a memory cell, a reference line (Reference-BUS) for reference, a precharge circuit (), a load circuit (), and an amplifier circuit (). The precharge circuit is connected to the data line and the reference line and configured to precharge the data line and the reference line. The load circuit is connected to the data line and the reference line and configured to apply a first constant current to the data line and apply a second constant current which is smaller than the first constant current to the reference line. The amplification circuit is connected to the data line and the reference line and configured to amplify a differential voltage between the data line and the reference line.


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