Memory devices with memory cell transistors having gate sidewell spacers with different dielectric properties

Abstract

A memory device, such as a DRAM, SRAM or non-volatile memory device, includes a substrate, a gate electrode disposed on the substrate, and source and drain regions in the substrate adjacent respective first and second sidewalls of the gate electrode. First and second sidewall spacers are disposed on respective ones of the first and second sidewalls of the gate electrode. The first and second sidewall spacers have different dielectric constants. The first and second sidewall spacers may be substantially symmetrical and/or have substantially the same thickness.