The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2007

Filed:

Dec. 11, 2003
Applicants:

Akira Kuriyama, Kanagawa, JP;

Hirokatsu Miyata, Kanagawa, JP;

Albrecht Otto, Kanagawa, JP;

Miki Ogawa, Kanagawa, JP;

Hiroshi Okura, Kanagawa, JP;

Kazuhiko Fukutani, Kanagawa, JP;

Tohru Den, Kanagawa, JP;

Inventors:

Akira Kuriyama, Kanagawa, JP;

Hirokatsu Miyata, Kanagawa, JP;

Albrecht Otto, Kanagawa, JP;

Miki Ogawa, Kanagawa, JP;

Hiroshi Okura, Kanagawa, JP;

Kazuhiko Fukutani, Kanagawa, JP;

Tohru Den, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device array comprising highly densely arranged nano-size semiconductor devices is prepared by a simple method. The array comprises a porous body having cylinder-shaped pores formed by removing cylinder-shaped regions from a structure that includes a matrix member formed so as to contain silicon or germanium and the cylinder-shaped regions containing aluminum and dispersed in the matrix member, semiconductor regions formed in the pores, each having at least a p-n or p-i-n junction, and a pair or electrodes, arranged respectively on the top and at the bottom of the semiconductor regions. The semiconductor regions and the pair of electrodes form a plurality of semiconductor devices on a substrate.


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