The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 20, 2007
Filed:
Dec. 01, 2005
Lew Chua-eoan, San Jose, CA (US);
Atsushi Hasegawa, Sunnyvale, CA (US);
Hsuan-wen Wang, Sunnyvale, CA (US);
Lew Chua-Eoan, San Jose, CA (US);
Atsushi Hasegawa, Sunnyvale, CA (US);
Hsuan-Wen Wang, Sunnyvale, CA (US);
Renesas Technology Corpoartion, Tokyo, JP;
Abstract
An interface circuit according to one embodiment of the present invention includes a clock signal, a first phase locked loop coupled to the clock signal line and generating a reference clock signal, a second phase locked loop receiving the reference clock signal, and in accordance therewith, generating one or more phase shifted reference clock signals, and a data transceiver circuit coupled to receive at least one of the clock signal, the reference clock signal, or one or more of the phase shifted reference clock signals to control the flow of data between a first circuit and a second circuit. An interface circuit according to one embodiment of the invention can be used advantageously for controlling the flow of data between a CPU and an external memory.