The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2007

Filed:

Aug. 31, 2001
Applicants:

Toshiyuki Miyauchi, Tokyo, JP;

Kouhei Yamamoto, Kanagawa, JP;

Inventors:

Toshiyuki Miyauchi, Tokyo, JP;

Kouhei Yamamoto, Kanagawa, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03D 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

To appropriately express an erasure position of a code by a small-scale, simple-structured circuit, a soft-output decoding circuit () in each element decoder includes a received value and a priori probability information selection circuit () to select an input to-be-decoded received value TSR and extrinsic information or interleaved data TEXT, whichever is necessary for soft-output decoding. Based on inner erasure position information IERS supplied from an inner erasure information generating circuit (), the received value and a priori probability information selection circuit () replaces a position where no coded output exists due to puncture or the like with a symbol whose likelihood is '0'. That is, the received value and a priori probability information selection circuit () outputs information which assures a probability in which a bit corresponding to a position where there is no coded output is '0' or “1” to be “½”.


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