The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 20, 2007
Filed:
Jan. 10, 2005
Applicants:
Michael J. Schaffstein, Waltham, MA (US);
Brendan P. Mullaly, Nashua, NH (US);
Inventors:
Michael J. Schaffstein, Waltham, MA (US);
Brendan P. Mullaly, Nashua, NH (US);
Assignee:
Sigmatel, Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A delay lock loop for use in meeting SDRAM timing requirements, wherein a timing relationship between data generated by a computer chip and a clock in said DRAM is fully programmable, and wherein said delay lock loop is digitally implemented. The delay lock loop includes a first delay chain to measure a number of delay taps in a single clock cycle of the clock of the SDRAM and a second delay chain to delay the clock of the SDRAM. The second delay chain is matched to the first delay chain.