The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2007

Filed:

Sep. 27, 2004
Applicants:

Hiroki Kinugawa, Shiga, JP;

Yoshinori Ishikawa, Kyoto, JP;

Inventors:

Hiroki Kinugawa, Shiga, JP;

Yoshinori Ishikawa, Kyoto, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/175 (2006.01); G05F 1/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

An output circuit includes: a power supply unit; an output MIS transistor connected to the power supply unit; a reference MIS transistor that is connected to the power supply unit and is invariably in ON state; a current supply unit for generating a reference voltage Vref; an output terminal through which a current is supplied to a load circuit; a comparator; a logic circuit; and a control circuit for carrying out the ON/OFF control of the output MIS transistor. Comparison is made between the reference voltage Vref and output terminal voltage Vout by utilizing the ON-state resistances of the output and reference MIS transistors, thus detecting the magnitude of an output current. If the output current exceeds the target value, the output MIS transistor is turned OFF, thereby protecting it from an excessive current.


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