The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2007

Filed:

Aug. 20, 2003
Applicants:

Kazuyuki Yamada, Matsumoto, JP;

Takeshi Ashida, Matsumoto, JP;

Masahiko Nakazawa, Hata-machi, JP;

Masanori Yumoto, Matsumoto, JP;

Inventors:

Kazuyuki Yamada, Matsumoto, JP;

Takeshi Ashida, Matsumoto, JP;

Masahiko Nakazawa, Hata-machi, JP;

Masanori Yumoto, Matsumoto, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/485 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
Abstract

A wiring terminal is formed on a wiring substrate, and an electrode is formed on a semiconductor device. The width of the wiring terminal is smaller than the width of the electrode. When the semiconductor device is mounted on the wiring substrate, the wiring terminal becomes embedded in the electrode due to applied pressure.


Find Patent Forward Citations

Yamada, Kazuyuki. (2007). Semiconductor device mounting method, semiconductor device mounting structure, electro-optical device, electro-optical device manufacturing method and electronic device (U.S. Patent No. 7180196). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7180196

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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