The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2007

Filed:

May. 13, 2004
Applicants:

Tai-heui Cho, Gyeonggi-do, KR;

Hyuck-jin Kang, Seoul, KR;

Heui-won Shin, Seocho-gu, KR;

Gwang-seon Byun, Gyeonggi-do, KR;

Sun-joon Kim, Gyeonggi-do, KR;

Inventors:

Tai-Heui Cho, Gyeonggi-do, KR;

Hyuck-Jin Kang, Seoul, KR;

Heui-Won Shin, Seocho-gu, KR;

Gwang-Seon Byun, Gyeonggi-do, KR;

Sun-Joon Kim, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Integrated circuit devices are provided including an integrated circuit substrate and first through fourth spaced apart lower interconnects on the integrated circuit substrate. The third and fourth spaced apart lower interconnects are parallel to the first and second lower interconnects. A first fuse is provided on the first and second lower interconnects between the first and second lower interconnects and is electrically coupled to the first and second lower interconnects. A second fuse is provided spaced apart from the first fuse and on the third and fourth lower interconnects. The second fuse is between the third and fourth lower interconnects and is electrically coupled to the third and fourth lower interconnects. Related methods of fabricating integrated circuit devices are also provided.


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